This invention relates to a Random Access Memory (RAM) of the static type.
A memory cell of a static RAM is, in general, mainly composed of a flip-flop, and the higher the memory density becomes, the smaller the cell area is. Therefore, the conductance (gm) of the driver transistor in each cell is lowered, and, as a result, the bit line drive capability is reduced, requiring a small conductance (gm) load transistor for each bit line. However, such a static RAM has a disadvantage in that when the conductance (gm) of the bit line load transistor is small, the charging capability of the bit line becomes insufficient, and therefore the reverse data readout speed becomes low in a readout cycle immediately after a write cycle (i.e., where a "1" must be read immediately after a "0" has been written via the same bit line pair, or when a "0" is read immediately after a "1" has been written).